| 1. | Ilp instruction level parallelism
指令级平行运算 |
| 2. | Instruction level language
指令级语言 |
| 3. | Software pipelining ( swp ) is an effective technique for loop optimization
软件流水是开发循环指令级并行的重要编译技术。 |
| 4. | Software pipelining is a loop scheduling technique that extracts ilp by overlapping the execution of several consecutive iterations
软件流水是开发循环程序指令级并行性的重要编译优化技术。 |
| 5. | In this paper we have proposed instruction level at - speed current testing method taking both the characteristics of microprocessor and at - speed current testing into account
本文针对微处理器的特点,提出了指令级全速电流测试方法。 |
| 6. | Epic defines a new style of architecture that enables higher levels of instruction level parallelism ( ilp ) without unacceptable hardware complexity
Epic是一种显性并行指令计算体系结构，主要思想是利用编译器和处理器的协同能力来提高指令级并行度。 |
| 7. | In chapters optimization methods is depicted in detail on tm1300 and some optimization methods are introduced . and in chapter6 i will introduce the system implement and its performance
第五章将重点介绍基于tm1300的优化方法，对运动估计， dct和量化的算法优化以及指令级的优化进行了介绍。 |
| 8. | In this paper , an embedded 16 - bit processor core is designed , based on the characteristics of the wireless communication algorithm and instruction level acceleration technology
文章结合无线通信处理算法的特点，利用指令级加速技术，设计了一种基于无线通信中复数运算的16位嵌入式处理器核。 |
| 9. | Nowadays , all sorts of multimedia services and network services develop flourishingly . it is far from enough to meet the performance requirement of such services to exploit ilp only
在各种多媒体服务以及网络服务蓬勃发展的今天,仅仅开发传统的指令级并行性已经远远不能满足这些服务对微处理器的性能要求。 |
| 10. | Based on the dlx simulator , smarcof is modified with sma specific extension and heuristic optimizing rules . simulation of spec code shows that above rules could exploit hybrid parallelism effectively with rather low overhead
基于spec代码的模拟表明该方式能够有效的挖掘系统的潜力，实现深度的指令级并行和线程级并行开发。 |
